Hardware - IC Layout Design Engineer | Marvell Semiconductor Pune Area, India

Job Details:
*. Experience: 4+ years in Analog Design engineering (Layout/PD). Essential skills MS in EE required.
*. Experience in analog, mixed -signal layout, including designs of PGAs, ADC, DAC, PLL, SerDes Rx/Tx.
*. Knowledge in basic circuits, matching constraints, design -driven constraints expected according to experience level.
*. Standard analog layout techniques and good understandi ng of physical, electrical aspects of layout.
*. Experience with IP release, chip -level assembly and chip tape out procedures.
*. Good understandi ng of reliability physics including Electro -migration, ESD and Latch up.
*. Experience with 40nm and/or 28nm technologies and their device physics highly desirable
*. Work closely with the design team to accomplish the objectives
MS/MTECH in EE (8/10 GPA, India) with minimum experience levels of 4 years in the following technical areas:
*. Must have one or more of following skills: wireless transceiver circuit and system design; design of at least one of the following blocks: PA, LNA, VCO, PLL, Filters, ADC, DAC, Bandgap, and Regulator; Integrated Passive components and EM simulation tools.
*. Be familiar with Unix OS.
*. Understandi ng basic characteristi c of transistor, resistor, capacitor and diode.
*. Experience with Cadence or Silicon Canvas layout tools is plus.
*. Experience with DRC/LVS verification tools is plus..
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